Embedded Systems Architectures
People
Ansaloni G.
Course director
Course director
Description
The course deals with the high-level structure of modern digital systems, with a particular focus on low-power systems-on-chip and on massively parallel computing platforms. The lectures illustrate concepts and techniques leveraging the opportunities offered by instruction-, data-, thread- and request- level parallelism, in order to increase the run-time performance and the efficiency of processors. Real-world case studies are provided, detailing the characteristics of the ARM family of systems-on-chip and that of the OpenCL framework, among others. The course showcases how application domains shape the hardware features of computing ICs, which in turn demand dedicated execution and programming models.
REFERENCES
- J. L. Hennessy and D. A. Patterson. "Computer architecture: a quantitative approach, Fifth Edition". Elsevier, 2012.
- M. Scarpino, “OpenCL in Action”, Manning, 2012.
- S. Furber, "ARM System-on-Chip Architecture”, Addison-Wesley, 2000.
Education
- Master of Science in Cyber-Physical and Embedded Systems (until A.Y. 2016), Core course, Lecture, 1st year