This course describes microelectronic technologies and design techniques used to implement Systems on Chip (SoC) in which all system components are located on a single chip. The first chapter starts with layout design presented in a simple and clear way. The second chapter describes the design of simple CMOS circuits using simple methods that directly give transistor schematics. Basic cells that can be found today into standard cell libraries will be designed as examples. The two last chapters are focused on deep submicron technologies as well as on low-power design. The ITRS Roadmap is used for describing the possible evolution of microelectronic technologies for the next 15 years and the associated problems. The use of such technologies for SoC is mandatory, as these SoC will contain a very large number of transistors. One obvious problem is the power consumption, and the fourth chapter will describe the power consumption issues and the possible solutions at circuit and layout levels.