Computer Aided Verification

This course introduces an approach to validation of hardware and software based on formal analysis of system behaviors. Among the formal methods, model checking enjoys considerable popularity because of its high degree of automation and exhaustiveness of its analysis. This approach has been highly effective in the analysis of hardware designs and is becoming a mainstream technology in verifying correctness of software systems. The course presents the foundations of model checking starting from the modelling of systems and properties, and then proceeding with the basic verification algorithms. Among other things, the distinction between branching time and linear time is discussed, safety and liveness properties are defined, and the use of logics and automata as specifications is discussed. Additionally, the innovative solutions to verifying system upgrades and smart contracts will be presented.

PREREQUISITES
Algorithms & Complexity

REFERENCES

• Technical papers and reference manuals related to case studies provided by the Professor.