Development cost and size estimation starting from high-level specifications
Article in conference proceedings
This paper addresses the problem of estimating cost and development effort of a system, starting from its complete or partial high-level description. In addition, some modifications to evaluate the cost-effectiveness of reusing VHDL-based designs, are presented. The proposed approach has been formalized using an approach similar to the COCOMO analysis strategy, enhanced by a project size prediction methodology based on a VHDL function point metric. The proposed design size estimation methodology has been validated through a significant benchmark. The LEON-I microprocessor, whose VHDL description is of public domain.
CODES ''01: Proceedings of the ninth international symposium on Hardware/software codesign
ACM Press, New York, USA
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concurrent engineering, design reuse, process management, project size estimation, VHDL