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Adaptivity Support for MPSoCs based on Process Migration in Polyhedral Process Networks

Additional information

Authors
Cannella E., Derin O., Meloni P., Tuveri G., Stefanov T.
Type
Journal Article
Year
2012
Language
English
Subtitle
Special issue on Application-Driven Design of Processor, Memory, and Communication Architectures for MPSoCs
Abstract
System adaptivity is becoming an important feature of modern embedded multiprocessor systems. To achieve the goal of system adaptivity when executing Polyhedral Process Networks (PPNs) on a generic tiled Network-on-Chip (NoC) MPSoC platform, we propose an approach to enable the run-time migration of processes among the available platform resources. In our approach, process migration is allowed by a middleware layer which comprises two main components. The first component concerns the inter-tile data communication between processes. We develop and evaluate a number of different communication approaches which implement the semantics of the PPN model of computation on a generic NoC platform. The presented communication approaches do not depend on the mapping of processes, and have been implemented on a Network-on-Chip multiprocessor platform prototyped on an FPGA. Their comparison in terms of the introduced overhead is presented in two case studies with different communication characteristics. The second middleware component allows the actual run-time migration of PPN processes. To this end, we propose and evaluate a process migration mechanism which leverages the PPN model of computation to guarantee a predictable and efficient migration procedure. The efficiency and applicability of the proposed migration mechanism is shown in a real-life case study.
Journal
VLSI Design
Volume
2012
Number
Article ID 987209
Month
February
Keywords
middleware, network-on-chip (NoC), polyhedral process networks (PPN), process migration, system adaptivity