A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies
Additional information
Authors
Regazzoni F.,
Badel S.,
Eisenbarth T.,
Großschädl J.,
Poschmann A.,
Toprak Z.,
Macchetti M.,
Pozzi L.,
Paar C.,
Leblebici Y.,
Ienne P.
Type
Article in conference proceedings
Year
2007
Language
English
Abstract
This paper explores the resistance of MOS current mode logic (MCML) against differential power analysis (DPA) attacks. Circuits implemented in MCML, in fact, have unique characteristics both in terms of power consumption and the dependency of the power profile from the input signal pattern. Therefore, MCML is suitable to protect cryptographic hardware from DPA and similar side-channel attacks. In order to demonstrate the effectiveness of different logic styles against power analysis attacks, the non-linear bijective function of the Kasumi algorithm (known as substitution box S7) was implemented with CMOS and MCML technology, and a set of attacks was performed using power traces derived from SPICE-level simulations. Although all keys were discovered for CMOS, only very few attacks to MCML were successful.
Keywords
Algorithm design and analysis, Analytical models, circuit simulation, CMOS, CMOS logic circuits, CMOS technology, cryptographic functional units, cryptographic hardware, cryptography, differential power analysis, DPA-resistance evaluation, Energy consumption, Hardware, Kasumi algorithm, MCML, nonlinear bijective function, Performance analysis, power consumption, Protection, side-channel attacks, simulation-based methodology, SPICE, substitution box S7
Conference proceedings
Embedded Computer Systems: Architectures, Modeling and Simulation, 2007. IC-SAMOS 2007. International Conference on
Pages (or article number)
209-214
