Development cost and size estimation starting from high-level specifications
Informazioni aggiuntive
Autori
Fornaciari W.,
Salice F.,
Bondi U.,
Magini E.
Tipo
Contributo in atti di convegno
Anno
2001
Lingua
Inglese
Sommario
This paper addresses the problem of estimating cost and development effort of a system, starting from its complete or partial high-level description. In addition, some modifications to evaluate the cost-effectiveness of reusing VHDL-based designs, are presented. The proposed approach has been formalized using an approach similar to the COCOMO analysis strategy, enhanced by a project size prediction methodology based on a VHDL function point metric. The proposed design size estimation methodology has been validated through a significant benchmark. The LEON-I microprocessor, whose VHDL description is of public domain.
Parole chiave
concurrent engineering, design reuse, process management, project size estimation, VHDL
Titolo atti di convegno
CODES ''01: Proceedings of the ninth international symposium on Hardware/software codesign
Editore
ACM Press, New York, USA
Luogo convegno
Copenhagen, Denmark
Pagine (o numero dell’articolo)
86-91
ISBN
1-58113-364-2
