An Application Level Synthesis Methodology for Embedded Systems
Informazioni aggiuntive
Autori
Alippi C.,
Galbusera A.,
Stellini M.
Tipo
Contributo in atti di convegno
Anno
2002
Lingua
Inglese
Sommario
Time-to-market, cost and power consumption requirements are pushing research in embedded systems towards the development of sophisticated CAD environments. The paper suggests a novel synthesis methodology for embedded devices based on an application level perturbation analysis. The methodology is based on randomised algorithms for evaluating the effective performance loss of the computational flow induced by perturbations and a Tabu-search optimising algorithm for distributing the tolerable performance loss along the computational subsystems composing the computation.
Titolo atti di convegno
ISCAS 2002
Number ( Month )
May
Luogo convegno
Scottsdale
Pagine (o numero dell’articolo)
473-476
