Interface Synthesis in Multiprocessing Systems-on-Chips
Informazioni aggiuntive
Autori
Regazzoni F.,
Lajolo M.
Tipo
Contributo in atti di convegno
Anno
2004
Lingua
Inglese
Sommario
Although Moore''s Law, in principle, enables a huge number of components to be integrated into a single chip, design methods that will allow system architects to put the components together to achieve cost, power and time-to-market targets are severely lacking. System-level design and optimization techniques can significantly reduce the design gap by providing solutions that achieve correct-by-construction approach rather than the correct-by-iteration approach. This paper presents a programmatic interface generation tool for automating the generation of the hardware/software interfaces in the context of multi-processor Systems-On-Chips. The solutions that we present are of crucial importance in a platform based design environment for building a flexible system with reusable IPs and CPU cores.
Parole chiave
HW/SW co-design, system-on-chip (SoC)
Titolo atti di convegno
IP Based SoC Design 2004
Number ( Month )
December
Luogo convegno
Grenoble
