Online Task Remapping Strategies for Fault-tolerant Network-on-Chip Multiprocessors
Informazioni aggiuntive
Autori
Derin O.,
Kabakci D.,
Fiorin L.
Tipo
Atti di conferenza
Anno
2011
Lingua
Inglese
Sommario
As CMOS technology scales down into the deep submicron domain, the aspects of fault tolerance in complex Networks-on-Chip (NoCs) architectures are assuming an increasing relevance. Task remapping is a software based solution for dealing with permanent failures in processing elements in the NoC. In this work, we formulate the optimal task mapping problem for mesh-based NoC multiprocessors with deterministic routing as an integer linear programming (ILP) problem with the objective of minimizing the communication traffic in the system and the total execution time of the application. We find the optimal mappings at design time for all scenarios where single-faults occur in the processing nodes. We propose heuristics for the online task remapping problem and compare their performances with the optimal solutions.
Parole chiave
fault tolerance, heuristics, integer linear programming (ILP), kahn process networks (KPN), network-on-chip (NoC), self-adaptivity
Editore
ACM
Nome convegno
Fifth ACM/IEEE International Symposium on Networks-on-Chip
Luogo di pubblicazione
Pittsburgh
Pagine (o numero dell’articolo)
129-136
ISBN
978-1-4503-0720-8
