Computer Architectures and Logic Design

The course visits the major techniques that have been devised in order to get high performance from a single processor, and, later on, from multi-processors. After the course you will understand the concepts of pipelined CPUs, cache architecture and optimization, Instruction-Level parallelism (Superscalar and VLIW architectures), Thread-Level parallelism (fine-grained, coarse-grained, simultaneous multithreading), Data-level parallelism (Vector architectures), and shared-memory multi-processing. Along the way, we will also review the main principles of gate-level logic design, in order for you to understand the basics of how hardware computes.

Learn about the major architectural ideas that have made the incredible growth rate of modern microprocessors possible.

In presenza

Lectures, Assignments, Exams

Final exam and assignments. Potentially a paper presentation and potentially a midterm exam.