Francesco Regazzoni

http://usi.to/cod

Publications

Journal Article (14)

Pilato C., Garg S., Karri R., Regazzoni F. (2018) Securing Hardware Accelerators: a New Challenge for High-Level Synthesis, IEEE Embedded Systems Letters, 3 (November)
Brannigan S., Smyth N., Oder T., Valencia Patiño A. F., O'Sullivan E., Güneysu T., Regazzoni F. (2017) An Investigation of Sources of Randomness Within Discrete Gaussian Sampling, IACR Cryptology ePrint Archive, 2017
Regazzoni F., Banik S., Bogdanov A., Isobe T., Shibutani K., Hiwatari H., Akishita T. (2015) Midori: (A) Block Cipher for Low Energy (Extended Version), (IACR) Cryptology ePrint Archive, 2015 (December)
Banik S., Bogdanov A., Regazzoni F. (2015) Exploring Energy Efficiency of Lightweight Block Ciphers, (IACR) Cryptology ePrint Archive, 2015 (September)
Bayrak A. G., Regazzoni F., Novo D., Brisk P., Standaert F. X., Ienne P. (2015) Automatic Application of Power Analysis Countermeasures, IEEE Transactions on Computers, 64 (February)
Becker G., Regazzoni F., Paar C., Burleson W. (2014) Stealthy Dopant-Level Hardware Trojans: Extended Version, Journal of Cryptographic Engineering, 4 (April)
Barenghi A., Pelosi G., Regazzoni F. (2014) Simulation-Time Security Margin Assessment against Power-Based Side Channel Attacks, (IACR) Cryptology ePrint Archive, 2014 (May)
Barenghi A., Hocquet C., Bol D., Standaert F. X., Regazzoni F., Koren I. (2014) A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks, IEEE Transactions on Emerging Topics in Computing, PP (April)
Bol D., Hocquet C., Regazzoni F. (2013) A Fast ULV Logic Synthesis Flow in Many-Vt CMOS Processes for Minimum Energy under Timing Constraints, IEEE Transactions on Circuits and Systems II, 59
Bayrak A. G., Regazzoni F., Novo Bruna D., Brisk P., Standaert F. X., Ienne P. (2013) Automatic Application of Power Analysis Countermeasures, IEEE Transactions on Computers, PP (December)
Bol D., Hocquet C., Regazzoni F. (2012) A Fast ULV Logic Synthesis Flow in Many-Vt CMOS Processes for Minimum Energy Under Timing Constraints, IEEE Transactions on Circuits and Systems II: Express Briefs, 59-II (February)
Hocquet C., Kamel D., Regazzoni F., Legat J. D., Flandre D., Bol D., Standaert F. X. (2011) Harvesting the potential of nano-CMOS for lightweight cryptography: An ultra-low-voltage 65 nm AES coprocessor for passive RFID tags, Springer Journal of Cryptographic Engineering, 1
Bailey D. V., Batina L., Bernstein D. J., Birkner P., Bos J. W., Chen H. ., Cheng C. ., van Damme G., Güneysu T., Gurkaynak F., Kleinjung T., Paar C., Regazzoni F., Niederhagen R., Schwabe P., Uhsadel L., Van Herrewege A. (2009) Breaking ECC2K-130, IACR Cryptology ePrint Archive, 2009 (November)
Regazzoni F., Eisenbarth T., Poschmann A., Großschädl J., Gurkaynak F., Macchetti M., Toprak Z., Pozzi L., Paar C., Leblebici Y., Ienne P. (2009) Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology

Book chapter (7)

Piscitelli R., Bhasin S., Regazzoni F. (2017) Fault Attacks, Injection Techniques and Tools for Simulation. Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment. Springer. First edition; 2016
Sklavos N., Chaves R., Di Natale G., Regazzoni F. (2017) Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment. Springer. First edition; 2016
Milosevic J., Regazzoni F., Malek M. (2017) Malware Threats and Solutions for Trustworthy Mobile Systems Design. Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment. Springer. First edition; 2016
Durvaux F., Kerckhof S., Regazzoni F., Standaert F. X., Markantonakis K. (2014) Security IPs and IP Security with FPGAs. Secure Smart Embedded Devices Platform and Applications
Regazzoni F., Breveglieri L., Ienne P., Koren I., Joye M. a. T. (2012) Interaction between Fault Attack Countermeasures and the Resistance against Power Analysis Attacks. Fault Analysis in Cryptography. Springer Berlin Heidelberg. Information Security and Cryptography Series, Springer
Regazzoni F., Cevrero A., Standaert F. X., Badel S., Kluter T., Brisk P., Leblebici Y., Ienne P. (2009) A Design Flow and Evaluation Framework for DPA-resistant Instruction Set Extensions. Cryptographic Hardware and Embedded Systems (CHES). Springer Berlin Heidelberg. Lecture Notes in Computer Science
Regazzoni F., Eisenbarth T., Poschmann A., Großschädl J., Gurkaynak F., Macchetti M., Toprak Z., Pozzi L., Paar C., Leblebici Y. (2009) Evaluating resistance of MCML technology to power analysis attacks using a simulation-based methodology. Transactions on Computational Science IV. Springer

Article in conference proceedings (78)

Pilato C., Basu K., Shayan M., Regazzoni F., Karri R. (2019) High-Level Synthesis of Benevolent Trojans. Proceedings of the IEEE Design, Automation and Test in Europe Conference (DATE)
Wahab M. A., Milosevic J., Regazzoni F., Ferrante A. (2019) Power and Performance Optimized Hardware Classifiers for Eefficient Oon-device Malware Detection. Cryptography and Security in Computing Systems. ACM. Valencia, Spain
Khalid A., Howe J., Rafferty C., Regazzoni F., O'Neil M. (2018) Compact, Scalable, and Efficient Gaussian Samplers for Lattice-Based Cryptography. Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS) 2018
Banik S., Bogdanov A., Regazzoni F. (2018) Efficient Configurations for Block Ciphers with Unified ENC/DEC Paths. Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust (HOST) 2017
Banik S., Bogdanov A., Isobe T., Hiwatari H., Akishita T., Regazzoni F. (2018) Inverse Gating for Low Energy Block Ciphers. Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
Valencia Patiño A. F., Oder T., Güneysu T., Regazzoni F. (2018) Exploring the Vulnerability of R-LWE Encryption to Fault Attacks. ACM. New York, NY, USA
Mentens N., Charbon E., Regazzoni F. (2018) Rethinking Secure FPGAs: TowardsCryptography-friendly Configurable Cell Architecture and its Automated Design Flow. Proceedings of FCCM
Pilato C., Regazzoni F., Karri R., Garg S. (2018) TAO: Techniques for Algorithmic Obscuration during High-Level Synthesis. Proceedings of the ACM/IEEE Design Automation Conference (DAC)
Regazzoni F., Fowler A., Polian I. (2018) Quantum Era Challenges for Classical Computers. Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation. ACM. New York, NY, USA
Chaves R., Chmielewski \., Regazzoni F., Batina L. (2018) SCA-Resistance for AES: How Cheap Can We Go?. Progress in Cryptology -- AFRICACRYPT 2018. Springer International Publishing. Cham
Regazzoni F., Alippi C., Polian I. (2018) Security: The Dark Side of Approximate Computing?. Proceedings of the International Conference on Computer-Aided Design. ACM. New York, NY, USA
Masin M., Palumbo F., Myrhaug H., Filho J. A. d. O., Pastena M., Pelcat M., Raffo L., Regazzoni F., Sanchez A. A., Toffetti A., de la Torre E., Zedda K. (2017) Cross-layer Design of Reconfigurable Cyber-Physical Systems. Proceedings of Design, Automation and Test in Europe (DATE) 2017
Valencia Patiño A. F., Khalid A., O'Sullivan E., Regazzoni F. (2017) The design space of the number theoretic transform: A survey. 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2017, Pythagorion, Greece, July 17-20, 2017 (Invited)
O'Sullivan E., Regazzoni F. (2017) Special Session Paper: Efficient Arithmetic for lattice-based Cryptography. Proceedings of the CODES+ISSS 2017
Howe J., Moore C., O'Neill M., Regazzoni F., Güneysu T., Beeden K. (2016) Standard lattices in hardware. Proceedings of the 53rd Annual Design Automation Conference DAC 2016. ACM. Proceedings of DAC. Austin, TX, USA
O'Neill M., O'Sullivan E., McWilliams G., Saarinen M. J., Moore C., Khalid A., Howe J., Del Pino R., Abdalla M., Regazzoni F., Valencia A. F., Güneysu T., Oder T., Waller A., Jones G., Barnett A., Griffin R., Byrne A., Ammar B., Lund D. (2016) Secure architectures of future emerging cryptography. International Conference on Computing Frontiers CF''16. ACM New York. Proceedings of the ACM International Conference on Computing Frontiers. Como, italy
Banik S., Bogdanov A., Regazzoni F., Isobe T., Hiwatari H., Akishita T. (2016) Round gating for low energy block ciphers. 2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST. IEEE Computer Society. McLean, VA, USA
Regazzoni F., Ienne P. (2016) Instruction Set Extensions for secure applications. Design, Automation Test in Europe Conference DATE 2016. IEEE. Dresden, Germany
Bellon S., Favi C., Malek M., Macchetti M., Regazzoni F. (2016) Evaluating the Impact of Environmental Factors on Physically Unclonable Functions. International Symposium on Field-Programmable Gate Arrays FPGA 2016. ACM New York, NY, USA. Proceedings of the 2016 ACM/SIGDA. Monterey, CA, USA
Banik S., Bogdanov A., Fanni T., Sau C., Raffo L., Palumbo F., Regazzoni F. (2016) Adaptable AES implementation with power-gating support. International Conference on Computing Frontiers CF''16. ACM Ney York, NY, USA. Proceedings of the ACM International Conference on Computing Frontiers. Como, Italy
Banik S., Bogdanov A., Regazzoni F. (2016) Atomic-AES: A Compact Implementation of the AES Encryption/Decryption Core. Proceedings of 17th International Conference on Cryptology in India (INDOCRYPT) 2016
Oder T., Güneysu T., Valencia Patiño A. F., Khalid A., O'Neill M., Regazzoni F. (2016) Lattice-based cryptography: From reconfigurable hardware to ASIC. 2016 International Symposium on Integrated Circuits (ISIC). IEEE
Polian I., Becker G. T., Regazzoni F. (2016) Trojans in Early Design Steps - An Emerging Threat. TRUDEVICE Final Conference (FCTRU\^a16)
Regazzoni F. (2016) Physical Attacks and Beyond. Proceedings of the Selected Areas in Cryptography: 23nd International Conference (SAC) 2016
Bhasin S., Regazzoni F. (2015) A survey on hardware trojan detection techniques. IEEE International Symposium on Circuits and Systems (ISCAS) 2015. IEEE. Lisbon, Portugal
Guo X., Karimi N., Regazzoni F., Jin C., Karri R. (2015) Simulation and Analysis of Negative-Bias Temperature Instability Aging on Power Analysis Attacks. IEEE Int. Symposium on Hardware-Oriented Security and Trust. McLean, VA, USA
Banik S., Bogdanov A., Isobe T., Shibutani K., Hiwatari H., Akishita T., Regazzoni F. (2015) Midori: A Block Cipher for Low Energy. 21st International Conference on the Theory and Application of Cryptology and Information Security ASIACRYPT 2015. Springer Berlin Heidelberg. Lecture Notes in Computer Science. Auckland, New Zealand
Piscitelli R., Bhasin S., Regazzoni F. (2015) Fault attacks, injection techniques and tools for simulation. 10th International Conference on Design Technology of Integrated Systems in Nanoscale Era DTIS 2015. IEEE. Naples, Italy
Banik S., Bogdanov A., Regazzoni F. (2015) Exploring the energy consumption of lightweight blockciphers in FPGA. International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015. IEEE. Rivera Maya, Mexico City
Banik S., Bogdanov A., Regazzoni F. (2015) Exploring Energy Efficiency of Lightweight Block Ciphers. Selected Areas in Cryptography: 22nd International Conference (SAC)2015. Springer. Lecture Notes in Computer Science. Sackville, NB, Canada
Faruque M. A. A., Regazzoni F., Pajic M. (2015) Design methodologies for securing cyber-physical systems. 2015 International Conference on Hardware/Software Codesign and System Synthesis CODES+ISSS. IEEE. Amsterdam, Netherlands
Regazzoni F., Graves R., Di Natale G., Batina L., Bhasin S., Ege B., Fournaris A. P., Mentens N., Picek S., Rozic V., Sklavos N., Yang B. (2015) Challenges in designing trustworthy cryptographic co-processors. IEEE International Symposium on Circuits and Systems (ISCAS) 2015. IEEE. Lisbon, Portugal
Homulle H., Regazzoni F., Charbon E. (2015) 200 MS/s ADC implemented in a FPGA employing TDCs. FPGA International Symposium on Field-Programmable Gate Arrays ACM/SIGDA 2015. ACM. Proceedings of the 2015 ACM/SIGDA. Monterey, CA, USA
Regazzoni F. (2015) Physical attacks, introduction and application to embedded processors. 10th International Conference on Design Technology of Integrated Systems in Nanoscale Era DTIS 2015. IEEE. Napoli, Italy
Milosevic J., Ferrante A., Regazzoni F. (2015) Security Challenges for Hardware Designers of Mobile Systems. 2015 Mobile Systems Technologies Workshop (MST)
Güneys T., Regazzoni F., Sasdrich P., Wojcik M. (2014) (THOR) - The hardware onion router. 24th International Conference on Field Programmable Logic and Applications, (FPL) 2014. IEEE. Munich, Germany
Regazzoni F., Burri S., Stucki D., Maruyama Y., Bruschini C., Charbon E. (2014) Single-Photon Avalanche Diodes (SPADs) for quantum random number generators and beyond. 19th Asia and South Pacific Design Automation Conference (ASP-DAC) 2014. IEEE. Singapore
Bhasin S., Maistri P., Regazzoni F. (2014) Malicious Wave: a Survey on Actively Tampering Using Electromagnetic Glitch. International Symposium on Electromagnetic Compatibility 2014
Amaral J., Regazzoni F., Tomas P., Chaves R. (2014) Accelerating differential power analysis on heterogeneous systems. The 9th Workshop on Embedded Systems Security (WESS) 2014. ACM. New Delhi, India
Sami M. G., Malek M., Bondi U., Regazzoni F. (2014) Embedded Systems Education: Job Market Expectations. Workshop on Embedded and Cyber-Physical Systems Education (WESE). ACM. New Delhi, India
Becker G., Regazzoni F., Paar C., Burleson W. (2013) Stealthy Dopant-Level Hardware Trojans. Workshop on Cryptographic Hardware and Embedded Systems (CHES). Santa Barbara, California, USA
Bayrak A. G., Regazzoni F., Novo Bruna D., Ienne P. (2013) Sleuth: Automated Verification of Software Power Analysis Countermeasures. Workshop on Cryptographic Hardware and Embedded Systems (CHES). Santa Barbara, California, USA
Bogdanov A., Mendel F., Regazzoni F., Rijmen V., Tischhauser E. (2013) Lightweight AES-Based Authenticated Encryption. Fast Software Encryption (FSE). Singapore
Burri S., Stucki D., Maruyama Y., Bruschini C., Charbon E., Regazzoni F. (2013) Jailbreak Imagers: Transforming a Single-Photon Image Sensor into a True Random Number Generator. International Image Sensor Workshop (IISW). Snowbird Resort, Utah, USA
Bayrak A. G., Velickovic N., Regazzoni F., Novo Bruna D., Brisk P., Ienne P. (2013) An eda-friendly protection scheme against side-channel attacks. Design, Automation and Test in Europe (DATE). Grenoble, France
Powolny F., Burri S., Bruschini C., Michalet X., Regazzoni F., Charbon E. (2013) Comparison of Two Cameras based on Single Photon Avalanche Diodes (SPADS) for Fluorescence Lifetime Imaging Application with Picosecond Resolution. International Image Sensor Workshop (IISW). Snowbird Resort, Utah, USA
Charbon E., Regazzoni F. (2013) Single-Photon Image Sensors. Special Session, 50th Design Automation Conference (DAC). Austin, Texas, USA
Barenghi A., Pelosi G., Regazzoni F. (2012) Simulation-Time Security Margin Assessment Against Power-Based Side Channel Attacks. 7th Workshop on Embedded Systems Security (WESS). Tampere, Finland
Lamichhane B., Mudda S., Regazzoni F., Puiatti A. (2012) LEXCOMM: A low energy, secure and flexible communication protocol for a heterogenous body sensor network. IEEE-EMBS International Conference on Biomedical and Health Informatics. Hong Kong, China
Balasch J., Ege B., Eisenbarth T., Grard B., Gong Z., Gneysu T., Heyse S., Kerckhof S., Koeune F., Plos T., Poppelmann T., Regazzoni F., Standaert F. X., Van Assche G., Van Keer R., Oldenzeel L. V. O., von Maurich I. (2012) Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices. 11th Smart Card Research and Advanced Application Conference (CARDIS). Graz, Austria
Eisenbarth T., Gong Z., Gneysu T., Heyse S., Indesteege S., Kerckhof S., Koeune F., Nad T., Plos T., Regazzoni F., Standaert F. X., Oldenzeel L. V. O. (2012) Compact Implementation and Performance Evaluation of Block Ciphers in ATtiny Devices. Progress in Cryptology - Africacrypt. Ifrance, Morocco
Fiorin L., Ferrante A., Padarnitsas K., Regazzoni F. (2012) Security Enhanced Linux on Embedded Systems: a Hardware-accelerated Implementation. 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012. Sydney, Australia
Cevrero A., Regazzoni F., Schwander M., Badel S., Ienne P., Leblebici Y. (2011) Power-Gated MOS Current Mode Logic (PG-MCML): A Power-Aware DPA-Resistant Standard Cell Library. 48th Design Automation Conference (DAC). San Diego, Califorina
Kerckhof S., Durvaux F., Veyrat-Charvillon N., Regazzoni F., de Dormale G. M., Standaert F. X. (2011) Low Cost FPGA Implementations of the SHA-3 Finalists. 10th Smart Card Research and Advanced Application Conference (CARDIS). Leuven, Belgium
Medwed M., Petit C., Regazzoni F., Renauld M., Standaert F. X. (2011) Fresh Re-Keying II: Securing Multiple Parties against Side-Channel and Fault Attacks. 10th Smart Card Research and Advanced Application Conference (CARDIS). Leuven, Belgium
Regazzoni F., Yi W., Standaert F. X. (2011) FPGA Implementations of the AES Masked Against Power Analysis Attacks. 2nd International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE). Darmstadt, Germany
Bayrak A. G., Regazzoni F., Brisk P., Standaert F. X., Ienne P. (2011) A First Step Towards Automatic Application of Power Analysis Countermeasures. 48th Design Automation Conference (DAC). San Diego, Califorina
Barenghi A., Hocquet C., Bol D., Standaert F. X., Regazzoni F., Koren I. (2011) Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-Threshold Devices through an Example of a 65nm AES Implementation. 7th Workshop on RFID Security and Privacy (RFIDSec). Amherst, Massachussets, USA
Tumeo A., Regazzoni F., Palermo G., Ferrandi F., Sciuto D. (2010) A Reconfigurable Multiprocessor Architecture for a Reliable Face Recognition Implementation. Proceedings of Design, Automation and Test in Europe (DATE) Conference. Dresden, Germany
Barenghi A., Breveglieri L., Koren I., Pelosi G., Regazzoni F. (2010) Low Cost Software Countermeasures Against Fault Attacks: Implementation and Performances Trade Offs. 5th Workshop on Embedded Systems Security (WESS). Scottsdale, Arizona, USA
Gallais J. F., Großschädl J., Hanley N., Kasper M., Medwed M., Regazzoni F., Schmidt J. M., Tillich S., Wojcik M. (2010) Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software. 2nd International Conference on Trusted Systems (INTRUST). Beijing, China
Medwed M., Standaert F. X., Großschädl J., Regazzoni F. (2010) Fresh Re-Keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices. Proceedings of Progress in Cryptology - Africacrypt. Stellenbosch, South Africa
Bailey D. V., Baldwin B., Batina L., Bernstein D. J., Birkner P., Bos J. W., van Damme G., de Meulenaer G., Fan J., Gurkaynak F., Güneys T., Kleinjung T., Lange T., Mentens N., Paar C., Regazzoni F., Schwabe P., Uhsadel L. (2009) The Certicom Challenges ECC2-X. Workshop on Special Purpose Hardware for Attacking Cryptographic Systems (SHARCS). Lausanne, Switzerland
Regazzoni F., Eisenbarth T., Breveglieri L., Ienne P., Koren I. (2008) Can knowledge regarding the presence of countermeasures against fault attacks simplify power attacks on cryptographic devices?. Proceedings of 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTS 08)
Bertoni G. M., Breveglieri L., Farina R., Regazzoni F. (2008) A 640 Mbit/s 32-bit Pipelined Implementation of the AES Algorithm. SECRYPT. Porto, Portugal
Nacul A. C., Regazzoni F., Lajolo M. (2007) Hardware Scheduling Support in SMP Architectures. Proceedings of the conference on Design, automation and test in Europe (DATE'07). Accepted for Pubblication at Design, Automation and Test in Europe (DATE) 2007, 16-20 April, Nice, France. Proceedings of the conference on Design, automation and test in Europe (DATE'07). Nice, France. April, 2007
Regazzoni F., Bonesana I., Djakov M., Mattiuz A. (2007) Tairona, an Open Source Platform for Worldwide Meeting and Tutoring. World Conference on Educational Multimedia, Hypermedia and Telecommunications 7 (ED-MEDIA 07). Vancouver, Canada
Otero J., Regazzoni F., Lajolo M. (2007) Rapid Creation of Application Models from Bandwidth Aware Core Graphs. Proceedings of: IP Based SoC Design 2007. Grenoble, France
Regazzoni F., Eisenbarth T., Großschädl J., Breveglieri L., Ienne P., Koren I., Paar C. (2007) Power Attacks Resistance of Cryptographic S-boxes with added Error Detection Circuits. proceedings of: ''22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT''07). Rome, Italy
Nacul A. C., Regazzoni F., Lajolo M. (2007) HardwareScheduling Support in SMP Architecture. Design, Automation and Test in Europe(DATE). Nice, France
Giaconia M., Macchetti M., Regazzoni F., Schramm K. (2007) Area and Power Efficient Synthesis of DPA-Resistant Cryptographic SBoxes. International Conference on VLSI Design \& Embedded Systems. Bangalore, India
Regazzoni F., Badel S., Eisenbarth T., Großschädl J., Poschmann A., Toprak Z., Macchetti M., Pozzi L., Paar C., Leblebici Y., Ienne P. (2007) A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. Embedded Computer Systems: Architectures, Modeling and Simulation, 2007. IC-SAMOS 2007. International Conference on
Bertoni G. M., Breveglieri L., Farina R., Regazzoni F. (2006) Speeding Up AES By Extending a 32 bit Processor Instruction Set. ASAP ''06: Proceedings of the IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP''06). IEEE Computer Society. Washington, DC, USA
Chandra S., Regazzoni F., Lajolo M. (2006) Hardware/software partitioning of operating systems: A behavioral synthesis approach. GLSVLSI ''06: Proceedings of the 16th ACM Great Lakes symposium on VLSI. ACM Press, New York, USA. Philadelphia, PA, USA
Regazzoni F., Nacul A. C., Lajolo M. (2005) Automatic Synthesis of the Hardware/Software Interface in Multiprocessor Architectures. FDL''05 - Forum on Specification and Design Languages. Lausanne, Switzerland
Regazzoni F., Lajolo M. (2005) Hardware/Software Partitioning and Interface Synthesis in Networks On Chip. IP Based SoC Design 2005. Grenoble, France
Sami M. G., Macchetti M., Regazzoni F. (2005) Speeding Security on the Intel StrongARM. Embedded Intel Solutions
Regazzoni F., Lajolo M. (2004) Interface Synthesis in Multiprocessing Systems-on-Chips. IP Based SoC Design 2004. Grenoble