Area and Power Efficient Synthesis of DPA-Resistant Cryptographic SBoxes
Additional information
Authors
Giaconia M.,
Macchetti M.,
Regazzoni F.,
Schramm K.
Type
Article in conference proceedings
Year
2007
Language
English
Abstract
This paper presents a novel design methodology for the hardware implementation of non-linear bijective functions, commonly used in most symmetric-key cryptographic algorithms and known as substitution boxes (S-boxes). The proposed technique thwarts a particularly relevant class of side-channel attacks against cryptographic hardware, that of differential power analysis attacks (DPA). In the proposed approach, the cost of the countermeasure is kept low in terms of silicon process overheads (standard CMOS gates used), area requirement, power consumption and latency, when compared to existing countermeasures. Its effectiveness is proven by showing resistance to simulated DPA attacks using power curves derived with SPICE simulation.
Conference proceedings
International Conference on VLSI Design \& Embedded Systems
Month
January
Meeting place
Bangalore, India
Keywords
differential power analysis (DPA), low power design, side channel attacks
