Rapid Creation of Application Models from Bandwidth Aware Core Graphs
Additional information
Authors
Otero J.,
Regazzoni F.,
Lajolo M.
Type
Article in conference proceedings
Year
2007
Language
English
Abstract
We present a methodology that allows rapid creation of application models from bandwidth aware core graphs that are available in the literature for a wide range of applications and we discuss their applicability to the rapid exploration of multiple Networks on Chip (NoCs) layout organizations. In a bandwidth aware core graph, each node represents a core and the numbers on the edges represent the bandwidth requirements between cores. We describe core graphs in a UML object model diagram and we then have an automatic code generation tool which produces a SystemC description whose behaviour results in a packet generation on every output connection that respects the bandwidth requirements specified in the core graph. We can then rapidly derive a NoC mapping in which a specific floorplan of the cores can be evaluated and compared with alternate floorplan options for rapid design space exploration.
Conference proceedings
Proceedings of: IP Based SoC Design 2007
Month
December
Meeting place
Grenoble, France
Keywords
network-on-chip (NoC), rapid prototyping